Welcome


The 2012 Electronic System Level Synthesis Conference

June 2-3, 2012
San Francisco, California, USA

co-located with DAC!
 


Download the Call for Papers in PDF!


 

General Co-Chairs:
Sandeep Shukla, Virginia Tech

Philippe Coussy, Lab-STICC

Program Co-Chairs:
Jens Brandt, TU Kaiserslautern
Achim Rettberg, University of Oldenburg

Organization: Adam Morawiec, ECSI

Important Dates
Paper submission deadline: March 23
Notification of acceptance: April 30
Camera ready papers: May 14


Conference Description
The ever-increasing need for enhanced productivity in designing highly complex electronic systems drives the evolution of design methods beyond the traditional approaches. Virtual prototyping, design space exploration and system synthesis with the goal of optimized and functionally correct product implementations are needed for designing both HW and SW parts. ESL design does not only provide system architects with the right tools to make the right decisions about the system architecture, it includes the methodologies and techniques that correlate the ESL model. A well-connected ESL-to-implementation design flow is needed.

The system design teams expect newer and more efficient methods and tools supporting better management of the design complexity and reduction of the design cycle time all together, breaking the trend to compromise on the evaluation of various design implementation options. Designing at higher levels of abstraction is a viable way to better cope with the system design complexity, to verify earlier in the design process and to increase code reuse.

The Electronic System Level Synthesis Conference ESLsyn focuses on automated system design methods that enable efficient modelling of systems to provide the capability to synthesize HW platforms and embedded software with particular aspects related to synthesis.

Target Audience

This conference will provide an overview of existing and emerging solutions provided by both industrial partners (EDA companies) and research institutions in the domain of ESL synthesis. It will give an outline of synthesis methods and tools available currently in the market and discuss their applicability, performance, strengths and user experiences. Finally, the event will create a discussion platform for experience exchange between providers of synthesis technology and industry users, but also will be a forum to discuss scientific concepts and paradigms for the future evolution of synthesis methods.

Co-located with DAC!
Date:  Saturday, June 2 and Sunday, June 3
Time:  9am-5pm
Location:  Room 304, Moscone Center, Esplanade Area, San Francisco


ESLsyn 2012 is organized with the technical co-sponsorship of
IEEE & IEEE Council on Electronic Design Automation (CEDA)