Electronic System Level Synthesis Conference
Call for Contributions
The 2013 Electronic System Level Synthesis Conference
May 31-June 1, 2013
Austin, Texas, USA
50th ACM/EDAC/IEEE Design Automation Conference,
June 2-6, 2013 at the Austin Convention Center in Austin, TX
The Electronic System Level Synthesis Conference - ESLsyn is a forum to discuss automated system design methods that enable efficient modeling of systems to provide the capability to synthesize HW platforms and embedded software with particular aspects related to synthesis. The main aim of the conference is to bring research institutions and industrial partners in the domain of ESL synthesis closer together by informing practitioners of the latest theoretical results, and challenging theoreticians with complex industrial problems. ESLsyn wants to provide a discussion platform for experience exchange between providers of synthesis technology and industry users, but also will be a forum to discuss scientific concepts and paradigms for the future evolution of synthesis methods. It therefore welcomes both academic and industrial participants.
This conference will provide an overview of existing and emerging solutions provided by both industrial partners (EDA companies) and research institutions in the domain of ESL design and synthesis. It will give an outline of synthesis methods and tools currently available in the market and discuss their applicability, performance, strengths and user experiences. Finally, the event will create a platform to foster discussion and exchange between providers of synthesis technology and industry users, as well as as serving as a forum to discuss scientific concepts and paradigms for the future evolution of synthesis methods.
ESLsyn will focus on the five key tasks related to the design and verification of complex, programmable electronic products:
- The development of product architectures and specifications, including the incorporation and configuration of IP
- The mapping of applications onto a product platform, including hardware/software partitioning and processor optimization
- The creation of pre-silicon, virtual hardware platforms for software development
- The automated synthesis of hardware and software implementations for a given architecture
- The development of formal methods for verifying hardware and software
Within this scope, ESLsyn addresses:
- Cyber-Physical Systems/Platforms related to ESL design flows
- High-Level/Behavioral/Architectural Synthesis for hardware design in cooperation with ESL design flows
- Embedded Software Synthesis that is used as part of ESL design flows
|Paper Submission Deadline:||
|Notification of Acceptance:||April 9|
|Camera Ready Papers:||May 1|
Authors should submit full papers (up to 6 pages, double-column IEEE format) in PDF format through the web based submission system. Submitted papers should be anonymous, are required to describe original unpublished work and must not be under consideration for publication elsewhere. The conference proceedings will be published in electronic form with an ISSN and ISBN number and made available on the ECSI website and submitted for inclusion into IEEE Xplore. Selected best papers from several ESLsyn conference editions will be published in a book edited by SPRINGER.
Full submission requirements, templates and submission instructions can be found at http://www.ecsi.org/eslsyn2013/submissions.
ESLsyn 2013 is organized with the techincal co-sponsorship of CEDA.