Title Author Datesort icon Web Abstract Category Activity Name Pathfile Keywords Author
Semi-Automated HW/SW Codesign for Embedded Systems: from MARTE Models to SystemC Simulators
MURILLO Luis Gabriel
MURA Marcello
PREVOSTINI Mauro
2009-10-28

Although MDE and Hw/Sw Co-design are widely used to address the design complexity problem, the lack of design procedures and...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-UMES1-1.pdf MURILLO Luis Gabriel
Linking GENESYS Application Architecture Modeling with Platform Performance Simulation
KHAN Subayal
PANTSAR-SYVANIEMI Susanna
TIENSYRJÄ Kari
KREKU Jari
SOININEN Juha-Pekka
2009-10-28

Article / Conference FDL2009 Conference sites/default/files/FDL2009-UMES1-2.pdf KHAN Subayal
IP-XACT Components with Abstract Time Characterization
KHAN Aamir Mehmood
MALLET Frédéric
ANDRE Charles
DE SIMONE Robert
2009-10-28

Large System-on-Chips are built by assembly of components modeled at different representation levels (TLM, RTL). The IP-XACT standard focuses on...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-UMES1-3.pdf KHAN Aamir Mehmood
Design Automation Model for Application-Specific Processors on Reconfigurable Fabric
KURUMAHMUT Bayram
KABUKCU Gokhan
GHAMARI Roza
YURDAKUL Arda
2009-10-28

The process of embedded system design on reconfigurable architectures needs smart solutions to reduce development life-cycle...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-CSD1-2.pdf KURUMAHMUT Bayram
Rapid Prototyping of a DVB-SH Turbo Decoder Using High-Level-Synthesis
ROESSLER Marko
HEINKEL Ulrich
WANG Hailu
ENGIN Nur
DRESCHER Wolfram
2009-10-28

In this paper, we present a prototyping exercise, mapping a turbo decoder high-level description directly to FPGA for fast...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-CSD1-3.pdf ROESSLER Marko
Transaction Level Modeling of an Adaptive Multi-standard and Multi-Application Radio Communication System
BARRETEAU Anthony
LE NOURS Sébastien
PASQUIER Olivier
CALVEZ Jean-Paul
2009-10-28

Article / Conference FDL2009 Conference sites/default/files/FDL2009-CSD2-1.pdf BARRETEAU Anthony
Checkpoint and Restore for SystemC Models
MONTON Marius
BURTON Mark
ENGBLOM Jakob
2009-10-28

Article / Conference FDL2009 Conference sites/default/files/FDL2009-CSD2-3.pdf MONTON Marius
The Application of Aspectual Feature Module in the Development and Verification of SystemC Models
YE Jun
LI Tun
2009-10-28

It is often the case that lots of SystemC models are needed in the development a SoC project. Dow to develop these models...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-CSD3-1.pdf YE Jun
Another Take on Functional System-Level Design and Modeling
TOCZEK Tomasz
HOUZET Dominique
MANCINI Stéphane
2009-10-28

In this paper, we advocate a novel methodology suited for efficiently solving problems such as NoC instantiation or memory...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-CSD3-2.pdf TOCZEK Tomasz
A SystemC Superset for High-Level Synthesis
SMIRNOV Maxim
TAKACH Andres
2009-10-28

Today’s System-on-a-Chip (SoC) designs are becoming more and more complex. This creates demand for system level...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-JOINT SESSION-1.pdf SMIRNOV Maxim
EmCodeSyn: A Visual Framework for Multi-rate Data Flow Specifications and Code Synthesis for Embedded Applications
JOSE Bijoy
PRIBBLE Jason
STEWERT Lemaire
SHUKLA Sandeep K.
2009-10-28

In this paper, a new framework EmCodeSyn1 is introduced for visual debugging, execution and code synthesis
from multi-...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-JOINT SESSION-2.pdf JOSE Bijoy
DEVS2VHDL: Automatic Transformation of XML-specified DEVS Model of Computation Into Synthesizable VHDL Code
HUSS Sorin Alexander
MOLTER Hans Gregor
SEFFRIN André
2009-10-28

This paper presents a novel approach to transform DEVS Models of Computation into synthesizable VHDL code. By describing the...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-JOINT SESSION-3.pdf HUSS Sorin Alexander
High-level Synthesis Using Operation Properties
LANGER Jan
HEINKEL Ulrich
2009-10-28

We propose a high level synthesis approach to generate RT level hardware from a specification of operation properties. The...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-ABD1-1.High-Level Synthesis Using Operation Properties.pdf LANGER Jan
A Re-Use Methodology for Formal SoC Protocol Compliance
NGUYEN Minh D.
THALMAIER Max
WEDLER Markus
STOFFEL Dominik
KUNZ Wolfgang
2009-10-28

We propose a new methodology for formally specifying on-chip bus protocols and for verifying protocol compliance of...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-ABD1-2.A Re-Use Methodology for Formal SoC Protocol Compliance Verification.pdf NGUYEN Minh D.
RAT-based Formal Verification of QDI Asynchronous Controllers
ALSAYEG Khaled
MORIN-ALLORY Katell
FESQUET Laurent
2009-10-28

This paper presents a new method for formally verifying asynchronous circuits with a symbolic model checking
tool...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-ABD1-3.RAT-based formal verification of QDI asynchronous controllers.pdf ALSAYEG Khaled
Optimizing HW/SW Co-Simulation based on Run-Time Model Switching
KARNER Michael
STEGAR Christian
WEISS Reinhold
ARMENGAUD Eric
2009-10-28

The development of embedded systems nowadays is strongly supported by simulation in order to reduce development time and...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-EAMS1-1.pdf KARNER Michael
Fast and Unified SystemC AMS - HDL Simulation
ZAIDI Yaseen
GRIMM Christoph
HAASE Jan
2009-10-28

An agile methodology for mixed signal simulation is presented allowing seamless connection of simulators on as needed basis...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-EAMS1-2.pdf ZAIDI Yaseen
A VHDL-AMS Modeling Methodology for Top-Down/Bottom-Up Design of RF Systems
MAEHNE Torsten
VACHOUX Alain
GIROUD Frédéric
CONTALDO Matteo
2009-10-28

This paper presents a modelling methodology for the top-down/bottom-up design of RF systems based on systematic use of VHDL-...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-EAMS1-3.pdf MAEHNE Torsten
SMT-based Stimuli Generation in the SystemC Verification Library
WILLE Robert
GROSSE Daniel
HAEDICKE Finn
DRECHSLER Rolf
2009-10-28

Modelling at the Electronic System Level (ESL) is the established approach of the major System-on-chip (SoC) companies. While...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-ABD2-1.SMT-based Stimuli Generation in the SystemC Verification Library.pdf WILLE Robert
ISIS: Runtime Verification of TLM Platforms
FERRO Luca
PIERRE Laurence
2009-10-28

The context of this paper is the dynamic assertionbased verification (ABV) of TLM SystemC models. We have developed a...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-ABD2-2.pdf FERRO Luca
Local Application of Simulation Directed for Exhaustive Coverage of Schedulings in SystemC Specifications
HERRERA Fernando
VILLAR Eugenio
2009-10-28

Article / Conference FDL2009 Conference sites/default/files/FDL2009-ABD2-3.pdf HERRERA Fernando
Design of Experiments for Effective Pre-silicon Verification of Automotive Electronics
RAFAILA Monica
GRIMM Christoph
DECKER Christian
PELZ Georg
2009-10-28

The paper presents a method to validate the compliance with value-ranged requirements of heterogeneous electronic systems...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-EAMS2-1.pdf RAFAILA Monica
A Top-Down Approach for the Design of Low-Power Microsensor Nodes for Wireless Sensor Network
TERRASSON Guillaume
BRIAND Renaud
BASROUR Skandar
DUPE Valérie
2009-10-28

Article / Conference FDL2009 Conference sites/default/files/FDL2009-EAMS2-2.pdf TERRASSON Guillaume
HSPICE Implementation of a Numerically Efficient Model of CNT Transistor
KAZMIERSKI Tom
ZHOU Dafeng
AL-HASHIMI Bashir
2009-10-28

This paper presents the algorithms of an implementation of a numerically ef!cient carbon nanotube transistor (CNT) model in...

Article / Conference FDL2009 Conference sites/default/files/FDL2009-EAMS2-3.pdf KAZMIERSKI Tom
Proposal to Extend Frequency Domain Analysis in VHDL-AMS
HAASE Joachim
HESSEL Ewald
MAMMEN Heinz-Theo
2009-10-28

Article / Conference FDL2009 Conference sites/default/files/FDL2009-POSTER-1.pdf HAASE Joachim