SPRINT: SoC Design and Integration Standards
An FDL'08 Workshop
September 23-25, 2008
Stuttgart, Germany
DESCRIPTION
The semiconductor industry has seen tremendous growth, mainly because over time technology has enabled more advanced semiconductor products at lower prices. These semiconductor products have become the key building blocks for a broad range of affordable end-products for which new markets have appeared. Today, the many functions offered by such advanced products can be implemented using a single System-on-Chip (SoC).
Looking towards the future, the complexity of developing these SoCs is increasing continuously, as new process technologies enable higher integration densities in line with Moore’s Law. However, the productivity of hardware & software developers is not growing at a comparable pace. Designer productivity is the main obstacle to efficient implementation of complex SoCs. Standards to support the efficient reuse and exchange of IP modules are the way that this will be overcome.
The SPRINT project performs a rigorous research activity to obtain a breakthrough in technology for reuse and integration of Intellectual Property (IP) modules. It develops and deploys a standards-based open SoC design platform that supports the development of interoperable and reusable IPs and their efficient integration into
high quality SoCs.
The Key objectives of the SPRINT project are:
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To align the approaches of the European key players in the SoC domain towards IP reuse and to drive the identification & development of open interface standards for IP integration. Recent global standards such as SystemC/TLM & SPIRIT, which have been driven successfully by SPRINT partners, will be taken as starting point.
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To create an open SoC design platform, consisting of standards & a SoC design methodology, with matching tools & IP modules. Such design platform provides the basis for SoC design environments that support the efficient development & integration of interoperable and reusable IP modules, including debug & verification of SoCs.
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To enable European companies to be the first in the world to demonstrate and subsequently exploit the new standards-based SoC design environments in an interoperable way in order to improve on design productivity & the quality in SoC design.
AGENDA
Workshop Programme
At the workshop each session will present achievements of the project in defining standard proposals and enhancement to existing standards. These proposals and enhancements are based on requirements coming from concrete designs and IP integration examples.
Proposals for standard extensions were defined for:
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SystemC TLM2.0 standard
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SPIRIT IP-XACT 1.4 standard
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AMBA AXI Interface
Moreover, a new proposal for Multi-chip Cored Debug API was defined and provided for standardisation to the OCP-IP Debug Working Group.The presentation of standard proposals at this workshop will be completed by extensive demonstrations of prototype tool implementations and design cases.
The workshop will be organised along the following sessions:
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SPRINT intro: Partnership for Enhanced Reuse and Integration of IPs
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SoC Specification & Modelling
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SoC Verification Methods
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Task Level Interfaces & Device Level Interfaces
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SoC Debug Methods6. Project Results Demonstrations and Networking More details can be found at www.sprint-project.net. Updated agenda will be presented at www.ecsi.org/fdl
Contact:
Wido Kruijtzer, NXP Semiconductors
Project Manager
Phone: +31 40 27 26875
E-mail: Wido [dot] Kruijtzer [at] nxp [dot] com
Adam Morawiec, ECSI
Dissemination & EDA Forum
E-mail: Adam [dot] Morawiec [at] ecsi [dot] org
Phone: +33 4 76 63 49 34